Subject of invention is interpolator, which consists of input part with distribution of input signal on segments and generation of capacitor charging function with adaptive timer. Output is pulse- width modulated signal, which presents information of current position and angle respectively. Condition for correct operation is that input signals are orthogonal.
F.32 International patent
COBISS.SI-ID: 7561044Conductive photoresist was prepared applying the SU8 polymer matrix with extra conductive carbon black as the functional filler. Nanocomposites with different concentration of conductive filler were selected for photolithography: near the percolation threshold, in the intermediate region where the conductivity is not completely saturated and at concentration where the conductivity becomes independent on the content of the conductive inclusions. The particles were dispersed by the help of dispersing additive.
B.03 Paper at an international scientific conference
COBISS.SI-ID: 7302484In the paper problems with reception and propagation of electromagnetic energy in the ASIC, in our case at 800MHz and 40V/m electrical field, are presented. Particularly critical are power lines, because they are spread all over the circuit and they present dominant receiver for electromagnetic field. Some layout, design and simulation problems are presented in paper and some solutions are proposed for voltage regulator and operational amplifier. Such circuit blocks are most exposed and relevant parts of the ASIC.
B.03 Paper at an international scientific conference
COBISS.SI-ID: 7301716A method for digital system design based on latency registers is presented. Latency registers allow synthesis or automated netlist transformation of existing netlist into low-noise logic equivalent based on extended clock period with time-distributed switching and peak supply current reduction. The structure of latency register is presented along with the description in the standard synthesis format.
B.03 Paper at an international scientific conference
COBISS.SI-ID: 7300180Many integrated sensor systems have a linear temperature coefficient that needs to be compensated. This applies also to parameters like offset temperature coefficient and sensitivity temperature coefficient. An approach for offset and sensitivity temperature coefficient compensation is developed. The output that compensates the temperature dependency is also ratiometric to the supply voltage. The design concept and simulations are presented in the paper. The system is fabricated in 0.35 µm CMOS technology. The measurement results are discussed in the paper.
B.03 Paper at an international scientific conference
COBISS.SI-ID: 7300948